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robertnovak No, that's not possible since there's authenticated encryption between the SoC and secure element. An attacker has to exploit the main SoC or the OS to do that. The duress PIN/password feature would ideally be supported as part of the Weaver feature of the secure element to prevent bypassing it via an OS exploit, but you cannot do the kind of tampering that you're proposing. Physical anti-tampering as a whole would be incredibly weak if there wasn't authenticated encryption between the SoC and secure element. It would make the dedicated secure element chip into a liability rather than a strength for physical attacks, and that's not the case because there is authenticated encryption so there isn't a disadvantage to it being a separate chip beyond higher latency than if it was right next to the CPU. The SoC has a secure core and also a Trusted Execution Environment implemented via TrustZone (a CPU mode, rather than a separate core) both running Trusty OS in addition to the secure element. The secure core talks to the secure element via authenticated encryption.