Pixel 11 doesn't yet meet the GrapheneOS security standards and may be skipped

GrapheneOS

GazelleInitial GrapheneOS always uses MTE for the Linux kernel and nearly every base OS process. It doesn't have a toggle for whether it's enabled in the base OS. It's only temporarily disabled for a few base OS processes due to Pixel userspace driver bugs. Enabling MTE for user installed apps by default via the toggle for it is strongly recommended and will eventually become the default, but that's for improving the security of user installed apps rather than the OS.

GrapheneOS

DeletedUser1111 MTE is always enabled on GrapheneOS and used across the whole base OS including every base OS app. It's only opt-in for user installed apps with the exception of ones included in our compatibility database as being known to work with it.

erikfritzek

AtmosphericIgnition which version of 11 do you have? Base, fold, pro (12/256gb or 16/512+)?
May it be they've left MTE just for 16gb pro? Though it's unlikely having the same CPU they've limited such a feature on non-16gb models.

Foggy

Cellobright MTE isn't just a core feature, it needs support in the cache and memory subsystem. The bits you mention are presumably switchable when you instantiate the core in the silicon design, ie perhaps Google has changed their mind from having them on (and paying the cost for the extra tag handling logic) to having them off?

Interrogating the features registers of the core would be a way to confirm what is available.

wuseman

AtmosphericIgnition
Well that's... good?

Assuming the Google support isn't terrible as I expect it to be, maybe that means it will receive MTE soon. Fingers crossed!

AtmosphericIgnition

erikfritzek I have the 1TB 11 Pro, and I agree that it's unlikely the feature would be reserved for the higher memory models. From my understanding, MTE only increases memory usage by roughly 3%.

Checking the Sysfs location suggested by Foggy shows:

grizzly:/ $ cat /sys/devices/system/cpu/cpu*/regs/identification/midr_el1
0x00000000411fd8b1
0x00000000411fd8b1
0x00000000411fd8b1
0x00000000411fd8b1
0x00000000411fd8b1
0x00000000411fd8b1
0x00000000411fd8c0

cat /sys/devices/system/cpu/cpu*/regs/identification/revidr_el1
0x0000000000000003
0x0000000000000003
0x0000000000000003
0x0000000000000003
0x0000000000000003
0x0000000000000003
0x0000000000000001

My brain is too smooth to understand the register information.

ls /sys/devices/system/cpu/cpu*/regs/identification/
/sys/devices/system/cpu/cpu0/regs/identification:
midr_el1  revidr_el1

/sys/devices/system/cpu/cpu1/regs/identification:
midr_el1  revidr_el1

/sys/devices/system/cpu/cpu2/regs/identification:
midr_el1  revidr_el1

/sys/devices/system/cpu/cpu3/regs/identification:
midr_el1  revidr_el1

/sys/devices/system/cpu/cpu4/regs/identification:
midr_el1  revidr_el1

/sys/devices/system/cpu/cpu5/regs/identification:
midr_el1  revidr_el1

/sys/devices/system/cpu/cpu6/regs/identification:
midr_el1  revidr_el1

GazelleInitial

AtmosphericIgnition I'd put exactly zero trust in this... Surely?

DeletedUser1191

GazelleInitial I'm surprised anyone would answer that question at all.

GazelleInitial

DeletedUser1191 Seemed like they were just chatting to an LLM

Foggy

AtmosphericIgnition We're presumably looking for ID_AA64PFR1_EL1 - Processor Feature Register 1 and ID_AA64PFR2_EL1 - Processor Feature Register 2. For those I think you'd need to compile and run the sample program to print out the values as they aren't exposed by sysfs.

Edit: MIDR_EL1 has implementer 0x41 = 'A' for Arm, variant 0x1, architecture 0xf, part number 0xd8b, revision 0x1.

paul7285

If true, Pixel sales will hit buttom, and older ones will go up in price because high demand.

AtmosphericIgnition

Foggy Thanks for the clarification.

I built the sample program inside Termux, and ran it, and this is the output:

ID_AA64ISAR0_EL1    : 0x0021111110212120
ID_AA64ISAR1_EL1    : 0x0011101100311002
ID_AA64MMFR0_EL1    : 0x20000111ff000000
ID_AA64MMFR1_EL1    : 0x0000100000000000
ID_AA64PFR0_EL1     : 0x0001000100110011
ID_AA64PFR1_EL1     : 0x0000000000000021
ID_AA64DFR0_EL1     : 0x0000000000000006
ID_AA64DFR1_EL1     : 0x0000000000000000
MIDR_EL1            : 0x00000000411fd8b1
MPIDR_EL1           : 0x0000000080000000
REVIDR_EL1          : 0x0000000000000000

Handlebar6933

Eirikr70 Hopefully they get discounted after a year just like the Pixel, but we'll see

GazelleInitial

AtmosphericIgnition ouch

Eris

AtmosphericIgnition hopefully we hear some news with this upcoming update in September. I currently have the Pixel Pro 11 XL 512/16 GB and was really hoping to get Graphene setup on it.

ToucanSam

Eris Just jump on the QPR2 Beta.

Foggy

AtmosphericIgnition It would be useful to modify it to print ID_AA64PFR2_EL1, but that has the MTE bits clear in ID_AA64PFR1_EL1.

(There might possibly be anti fingerprinting reasons for the kernel to not supply the full register set here, but if that was the case I'd expect other behaviour, such as returning all zeroes)

Edit:
PFR1 decoded
PFR2

AtmosphericIgnition

Foggy

ID_AA64ISAR0_EL1    : 0x0021111110212120
ID_AA64ISAR1_EL1    : 0x0011101100311002
ID_AA64MMFR0_EL1    : 0x20000111ff000000
ID_AA64MMFR1_EL1    : 0x0000100000000000
ID_AA64PFR0_EL1     : 0x0001000100110011
ID_AA64PFR2_EL1     : 0x0000000000000000
ID_AA64DFR1_EL1     : 0x0000000000000000
ID_AA64DFR1_EL1     : 0x0000000000000000
MIDR_EL1            : 0x00000000411fd8b1
MPIDR_EL1           : 0x0000000080000000
REVIDR_EL1          : 0x0000000000000000

AtmosphericIgnition

ToucanSam The Android Beta program website says that no betas are available for the 11 Pro. They probably haven't finished porting it to QPR2 yet.

Foggy

AtmosphericIgnition So that looks like no MTE at all. Perhaps someone with a Pixel 8 to 10 series can confirm what they get?

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